FPGA Accelerated CEP Engine

FPGA acccelerated complex event processing framework

    Parameterized building blocks
  • selector
  • filter
  • pattern/sequence detector

  • Configurable & highly scalable arcchitecture

      Performance (throughput)
  • 10x performance gain over WSO2 Siddhi CEP
  • Verified using DEBS grand challenge 2013
    • Technology
  • Xilinx Virtex-6 XC6VLX240T FPGA
  • Xilinx ML605 Virtex-6 Connectivity Kit